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[OM] Re: Panasonic, Sanyo, and Sigma join Four Thirds

Subject: [OM] Re: Panasonic, Sanyo, and Sigma join Four Thirds
From: Tim Hughes <timhughes@xxxxxxxx>
Date: Fri, 13 Feb 2004 16:15:14 -0800 (PST)
Cc: chling@xxxxxxxxxxxxx
C.H. ,
      unforunately most of the user testing you see on noise, is overall system 
noise of which the
sensor pixels may be dominant or may not, and signal processing tricks are used 
to mask noise
effects. If the amplifier and electronics following the sensor is better than 
the sensor (if well
designed) then you may see the real differences between the sensors. Even the 
way the sensor clock
is implemented (sloped edges etc) can affect noise in CCD's.   It is 
interesting for example that
niche companies like Nucore make modified signal processing chains that 
significantly reduce noise
implying many normal post sensor implementations add significant noise over and 
above sensor
noise. (Nucore also greatly improves cross color coupling associated with 
dynamic range effects by
seperating the color channels) 

The sensor area, noise-tradeoff issue is, in theory a law of diminishing 
returns: For equal pixel
fill factor and same technology the noise improves only as sqrt(area), in other 
words linearly
with chip linear dimension.  So a sensor has to be 4 times larger in area (2X 
linear) to have half
the noise. A number of different types of noise are lumped together in user 
comparisons and
vendors use software to first order compensate for issues like dark current 
noise (pixel
leakage)and differences in pixel to pixel sensitivity (pattern noise), which 
are all "noise" to
the user, so the inherent differences in sensing technology may not be so 
obvious depending on how
well these additional signal processing steps are done or controlled. Dark 
current issues are
important at low light levels while pattern noise is important at any light 
level.  In any of
these sensors the noise performance can vary depending on who actually 
manufactures the chip, as
manufacturing cleanliness and contamination trap noise generating charge near 
chip surfaces. The
scaling of this "excess noise" with area is unkown, so may improve at a 
different rate from normal
sqrt law with area. In any case, this is a "manufacturing problem" rather than 
inherent to the
technology, but remains just as negative an effect to users. 

The assumption people tend to make, is the implentation of all these additional 
factors is equal
for all vendors, so only the inherent chip sensor technology is a variable. 
This is likely a bad
assumption! Nucore's website has some comparisons, showing how their post 
process chips improve
the same sensors performance.

Regards,
Tim Hughes

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